1 AM2319P analog power july, 2003 - rev. a preliminary publication order number: ds-am2319_h these miniature surf ace mount mosfets utilize high cell density process. low r ds(on) assures minimal power loss and conserves energy, making this device ideal for use in power management circuitry. typical applications are voltage control small signal switch, power management in portable and battery-powered products such as computer portable electronics and other battery power application. p - channel logic level mosfet ?low r ds(on) provides higher efficiency and extends battery life ? fast switch ? low gate charge ? miniature sot-23 surface mount package saves board space notes a. surface mounted on 1? x 1? fr4 board. b. pulse width limited by maximum junction temperature symbol m aximum units t <= 5 sec 250 steady-state 285 thermal resistance ratings parame te r o c/w maximum junction-to-ambient a r thja d s g symbol maximum units v ds -30 v gs 20 t a =25 o c-2.1 t a =70 o c-1.7 i dm 10 i s -0.4 a t a =25 o c1.25 t a =70 o c0.8 t j , t stg -55 to 150 o c continuous source current (diode conduction) a absolute maximum ratings (t a = 25 o c unless otherwise noted) parame te r pulsed drain current b v gate-source voltage drain-source voltage continuous drain current a i d a power dissipation a p d operating junction and storage temperature range w v ds (v) r ds ( on ) ( ? )i d (a) 0.20 @ v gs = -10 v -2.1 0.30 @ v gs = -4.5v -1.7 -30 product summary
2 AM2319P analog power july, 2003 - rev. a preliminary publication order number: ds-am2319_h notes a. pulse test: pw <= 3 00us duty cycle <= 2%. b. guaranteed by design, not subject to production testing. analog power (apl) reserves the right to make changes without further notic e to any products herein. apl makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does apl assume any liability arising ou t of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, conseque ntial or incidental damages. ?typical? parameters which may be provided in apl data sheet s and/or specifications can a nd do vary in different appli cations and actual performance may vary over time. all operating parameters , including ?typical? must be validated for each customer appli cation by customer?s technical experts. apl does not convey any license under its patent rights nor the rights of others. apl products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications int ended to support or sustain life, or for any other application in which the failure of the apl product could create a situation where personal inju ry or death may occur. should buyer purchase or use apl products for any such uninte nded or unauthorized application, buyer shall indemnify and hold a pl and its officers, employees, subsidiari es, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirect ly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that apl was negligent regarding the design or m anufacture of the part. apl is an equal opportunity/affirmative action employer. min typ max v ds = -24 v, v gs = 0 v -1 v ds = -24 v, v gs = 0 v, t j = 55 o c -10 gate-body leakage i gss v ds = 0 v, v gs = 20 v 100 na gate-threshold voltage v gs(th) v ds = v gs , i d = -250 ua -1.30 v on-state drain current a i d(on) v ds = -5 v, v gs = -4.5 v -3 a v gs = -10 v, i d = -2.1 a 0.20 v gs = -4.5 v, i d = -1.7 a 0.30 forward tranconductance a g fs v ds = -5 v, i d = -2.1 a 2 s diode forward voltage v sd i s = -0.4 a, v gs = 0 v -0.70 -1.2 v total gate charge q g 3.4 gate-source charge q gs 0.8 gate-drain charge q gd 1.5 turn-on delay time t d(on) 8 ris e time t r 18 turn-off delay time t d(off) 52 fall-time t f 39 specifications (t a = 25 o c unless otherwise noted) static te st conditions zero gate voltage drain current i dss a symbol paramete r limits nc v ds = -10 v, i d = -1.1 a, r g = 50 ? , v gen = -10 v unit drain-source on-resistance a r ds(on) ? ns dynamic b v ds = -10 v, v gs = -5 v, i d = -2.1 a
3 AM2319P analog power july, 2003 - rev. a preliminary publication order number: ds-am2319_h typical electrical characteristics figure 1. on-region characteristics figure 2. on-resistance variation with drain current and gate voltage figure 3. on-resistance variation with temperature figure 4. on-resistance variation with gate to source voltage figure 5. transfer characteristics figure 6. body diode forward voltage variation with source current and temperature
4 AM2319P analog power july, 2003 - rev. a preliminary publication order number: ds-am2319_h typical electrical characteristics normalized thermal transient impeda nce, junction to ambient figure 11. transient thermal response curve figure 9. capacitance characteristic figure 10. gate charge characteristic
5 AM2319P analog power july, 2003 - rev. a preliminary publication order number: ds-am2319_h typical electrical characteristics figure 12. transconductance variation with current & temperature figure 13. maximum safe operation area figure 14. sot-3 maximum steady-state variation power dissipati on versus copper pad area figure 15. maximum state-state drain current versus copper pad area
6 AM2319P analog power july, 2003 - rev. a preliminary publication order number: ds-am2319_h package information
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